Title:
VARIATION SUPPRESSING CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2020/110558
Kind Code:
A1
Abstract:
This variation suppressing circuit suppresses variations in a reference voltage supplied to a switched capacitor circuit (2, 42, 52) of a differential configuration. The switched capacitor circuit has a configuration in which an input capacitor (Cs1, Cs2) to be charged with an input voltage and a reference capacitor (Cr1, Cr2, Cd41, Cd42, Cl41, Cl42) to be charged with the reference voltage are mutually independently provided. The switched capacitor circuit is provided with a charge supply circuit (5) which generates, using a predetermined cancelling voltage, a cancelling charge for cancelling charging/discharging electric charges generated in the switched capacitor circuit, and supplies the cancelling charge to two reference input nodes (N1, N2, N41, N42) to which the reference voltage is supplied in the switched capacitor circuit.
Inventors:
HONDA KAZUTAKA (JP)
Application Number:
PCT/JP2019/042361
Publication Date:
June 04, 2020
Filing Date:
October 29, 2019
Export Citation:
Assignee:
DENSO CORP (JP)
International Classes:
H03M3/02; H03H19/00; H03M1/12
Foreign References:
| JP2017156194A | 2017-09-07 | |||
| JP2013055450A | 2013-03-21 | |||
| US20140375487A1 | 2014-12-25 |
Attorney, Agent or Firm:
SATO INTERNATIONAL PATENT FIRM (JP)
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