Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2024/014165
Kind Code:
A1
Abstract:
The present invention inhibits misalignment of a center position of a hole that is detected by a binarization process based on an image of a flange portion of a sleeve. A sleeve (30A) comprises: a cylindrical portion (32) that is mounted to an electrically conductive layer of an insulated circuit board of a semiconductor device, and has a hole (31); and a flange portion (33) that is provided at an open end thereof. The flange portion (33) has a plurality of protrusions (34) that extend from a first outer edge portion (36a) of an inner surface (36) of the hole (31) to an outer circumference (33a) as seen in a plan view from the open end side of the flange portion (32), and a plurality of recesses (35) that are provided between the protrusions and extend from a second outer edge portion (36b) of the inner surface (36) to the outer circumference (33a). Each protrusion (34) has a top surface (34a) that is continuous with the inner surface (36) at the first outer edge portion (36a), and each recess (35) has a bottom surface (35a) that is continuous with the inner surface (36) at the second outer edge portion (36b).
Inventors:
MIYAKOSHI MASAOKI (JP)
MARUYAMA RIKIHIRO (JP)
MARUYAMA RIKIHIRO (JP)
Application Number:
PCT/JP2023/020488
Publication Date:
January 18, 2024
Filing Date:
June 01, 2023
Export Citation:
Assignee:
FUJI ELECTRIC CO LTD (JP)
International Classes:
H01L23/12; H01L25/07; H01L25/18; H01R9/16
Foreign References:
| JP2021019064A | 2021-02-15 | |||
| JP2014187179A | 2014-10-02 | |||
| JP2016096253A | 2016-05-26 |
Attorney, Agent or Firm:
FUSO INTERNATIONAL PATENT FIRM (JP)
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