Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/058510
Kind Code:
A1
Abstract:
Provided is a semiconductor device in which chipping and microcracks that occur on end faces are as few and small as possible, and in addition, has a compressive stress field formed near the edge to suppress ruptures extending from these cracks. An SiC semiconductor device according to the present invention is a semiconductor device (1) comprising: a mounting surface (3) having a semiconductor layer (2) that is made of a single crystal, a semiconductor element being formed on the mounting surface (3); and a non-mounting surface (4) positioned on the side opposite to the mounting surface (3), the SiC semiconductor device having a compressive stress field (8) on the outer periphery part of at least one surface of the mounting surface (3) and the non-mounting surface (4).
More Like This:
JP6393596 | Aligner and alignment method |
WO/2013/165031 | SEMICONDUCTOR ELEMENT PRODUCTION METHOD |
JP2001060567 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE |
Inventors:
KITAICHI MITSURU (JP)
ASAI YOSHIYUKI (JP)
TAKEDA MASAKAZU (JP)
ASAI YOSHIYUKI (JP)
TAKEDA MASAKAZU (JP)
Application Number:
PCT/JP2022/036050
Publication Date:
April 13, 2023
Filing Date:
September 28, 2022
Export Citation:
Assignee:
MITSUBOSHI DIAMOND IND CO LTD (JP)
International Classes:
H01L21/301; B28D5/00; C30B29/36; H01L21/304; H01L29/12; H01L29/78
Foreign References:
JP2017228660A | 2017-12-28 | |||
JP2020098859A | 2020-06-25 | |||
JP2013055211A | 2013-03-21 | |||
JP2008247732A | 2008-10-16 | |||
JP2013136073A | 2013-07-11 | |||
US20200357637A1 | 2020-11-12 | |||
US20150214077A1 | 2015-07-30 |
Attorney, Agent or Firm:
YASUDA & OKAMOTO PATENT ATTORNEYS (JP)
Download PDF: