Title:
PULSE SIGNAL GENERATION CIRCUIT AND GENERATION METHOD, AND MEMORY
Document Type and Number:
WIPO Patent Application WO/2022/100149
Kind Code:
A1
Abstract:
Provided are a pulse signal generation circuit and generation method, and a memory. The pulse signal generation circuit comprises a clock frequency-division unit, a time delay circuit and a selection unit, wherein the clock frequency-division unit is configured to perform frequency division on a clock signal, so as to generate a clock frequency-division signal; the time delay circuit is configured to generate a time delay signal on the basis of the clock frequency-division signal; and the selection unit is configured to receive the clock frequency-division signal and the time delay signal at the same time, and perform selection according to a pre-set condition so as to generate a pulse signal. The effective level width of a pulse signal generated in the present disclosure can be controlled on the basis of both multiples of an external clock period and a delay time, and the period of the pulse signal is established using the period of a clock signal as the basis. Insofar as both the period and the width of a pulse signal can meet requirements, the effective level width of the pulse signal of the present disclosure is more controllable, such that a memory has good access performance.
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Inventors:
GAO ENPENG (CN)
SHANG WEIBING (CN)
JI KANGLING (CN)
SHANG WEIBING (CN)
JI KANGLING (CN)
Application Number:
PCT/CN2021/108544
Publication Date:
May 19, 2022
Filing Date:
July 27, 2021
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H03K7/08
Foreign References:
| CN201804106U | 2011-04-20 | |||
| CN206164491U | 2017-05-10 | |||
| US20040076055A1 | 2004-04-22 |
Attorney, Agent or Firm:
BEIJING INTELLEGAL INTELLECTUAL PROPERTY AGENT LTD. (CN)
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