Title:
NOISE CANCEL CIRCUIT AND DATA TRANSMISSION CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2019/003588
Kind Code:
A1
Abstract:
A noise cancel circuit (110) includes: a first parallel/serial conversion circuit (21) for converting input 2N-bit parallel data into serial data; an inversion circuit (20) for inverting one of odd-numbered bits and even-numbered bits of the input 2N-bit parallel data; a second parallel/serial conversion circuit (22) for converting, into serial data, parallel data output from the inversion circuit (20) and the input 2N-bit parallel data with the other of the odd-numbered bits and the even-numbered bits, which are not inverted; a first buffer (23) to which output data of the first parallel/serial conversion circuit (21) is input; and a second buffer (24) to which output data of the second parallel/serial conversion circuit (22) is input.
Inventors:
FUNABASHI MASAMI
KATO SYUJI
SHINMYO AKINORI
KATO SYUJI
SHINMYO AKINORI
Application Number:
PCT/JP2018/015786
Publication Date:
January 03, 2019
Filing Date:
April 17, 2018
Export Citation:
Assignee:
PANASONIC IP MAN CO LTD (JP)
International Classes:
H03K17/16; H03M9/00
Foreign References:
| JP2005318264A | 2005-11-10 | |||
| JP2010062304A | 2010-03-18 | |||
| JP2009232169A | 2009-10-08 | |||
| JPH09307457A | 1997-11-28 |
Attorney, Agent or Firm:
KAMATA Kenji et al. (JP)
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