Title:
MULTI-BIT ACCUMULATOR AND IN-MEMORY COMPUTING PROCESSOR WITH SAME
Document Type and Number:
WIPO Patent Application WO/2024/058572
Kind Code:
A1
Abstract:
A multi-bit accumulator includes 1-bit Wallace trees each configured to perform an add operation on single-bit input data, tristate logic circuits each configured to output a result of the add operation of the 1-bit Wallace trees according to an enable signal provided to the tristate logic circuits, and a shift-adder configured to perform an accumulation operation on the result of the add operation of the 1-bit Wallace trees by a shift operation based on a clock signal.
Inventors:
MYUNG SUNGMEEN (KR)
CHANG DONG-JIN (KR)
LEE JAEHYUK (KR)
YOON DAEKUN (KR)
YUN SEOK JU (KR)
CHANG DONG-JIN (KR)
LEE JAEHYUK (KR)
YOON DAEKUN (KR)
YUN SEOK JU (KR)
Application Number:
PCT/KR2023/013829
Publication Date:
March 21, 2024
Filing Date:
September 14, 2023
Export Citation:
Assignee:
SAMSUNG ELECTRONICS CO LTD (KR)
International Classes:
G06F7/544; G06F7/53; G06F7/62; G06F15/78; G06N3/063
Foreign References:
| US20210271959A1 | 2021-09-02 | |||
| US20170212968A1 | 2017-07-27 | |||
| US20210295905A1 | 2021-09-23 | |||
| US20190065151A1 | 2019-02-28 | |||
| US6434586B1 | 2002-08-13 |
Attorney, Agent or Firm:
MUHANN PATENT & LAW FIRM (KR)
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