Title:
DELAY CONTROL CIRCUIT, METHOD, AND SEMICONDUCTOR MEMORY
Document Type and Number:
WIPO Patent Application WO/2024/073909
Kind Code:
A1
Abstract:
Embodiments of the present disclosure provide a delay control circuit, a method, and a semiconductor memory. The delay control circuit comprises a decoding module and a delay module. The decoding module is configured to receive a mode register signal and to decode the mode register signal to generate at least one decoded signal. The delay module comprises at least one delay sub-module, and is configured to determine a selected target delay module from the at least one delay sub-module according to the at least one decoded signal, and to perform delay processing on a received initial command signal according to the target delay module and an external clock signal to obtain a target command signal. The time interval between the target command signal and the initial command signal meets a preset timing condition.
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Inventors:
HUANG ZEQUN (CN)
SUN KAI (CN)
SUN KAI (CN)
Application Number:
PCT/CN2022/127103
Publication Date:
April 11, 2024
Filing Date:
October 24, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
G11C11/408; G11C11/4076
Foreign References:
| CN110739014A | 2020-01-31 | |||
| US20130182516A1 | 2013-07-18 | |||
| CN103929173A | 2014-07-16 | |||
| US9536591B1 | 2017-01-03 | |||
| US20030076143A1 | 2003-04-24 |
Attorney, Agent or Firm:
CHINA PAT INTELLECTUAL PROPERTY OFFICE (CN)
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