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Title:
A 50%DUTY CYCLE QUADRATURE-IN AND QUADRATURE-OUT (QIQO) DIVIDE-BY-3 CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2020/211108
Kind Code:
A1
Abstract:
A Quadrature-In, Quadrature-Out (QIQO) clock divider divides by an odd divisor, such as three. An IQ input clock has in-phase and quadrature differential signals. Four stages of dynamic logic are arranged into a loop, with each stage output being one of four IQ output signals that have 90-degree phase separations. Each stage output drives the gates of a p-channel charging transistor and an n-channel discharging transistor of a next stage. Two p-channel charging logic transistors are in series between the next stage output and the p-channel charging transistor, and two n-channel evaluation transistors are in series between the next stage output and the n-channel discharging transistor. Different pairs of the four IQ input clock signals are applied to their gates. When the prior stage output is low, the stage output is charged. When the prior stage output is high, the stage output discharge timing is determined by the IQ signals.

Inventors:
CHAN TAT FU (CN)
Application Number:
PCT/CN2019/084397
Publication Date:
October 22, 2020
Filing Date:
April 25, 2019
Export Citation:
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Assignee:
HONG KONG APPLIED SCIENCE & TECH RESEARCH INST CO LTD (CN)
International Classes:
H03K23/64; H03L7/18
Foreign References:
EP1351378A12003-10-08
CN102821077A2012-12-12
CN101834603A2010-09-15
CN102369669A2012-03-07
US20060202767A12006-09-14
US9166571B22015-10-20
TW201308906A2013-02-16
Attorney, Agent or Firm:
CHINA TRUER IP (CN)
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