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Title:
DIGITAL SIGNAL PROCESSOR, DIGITAL SIGNAL PROCESSING METHOD, AND DIGITAL SIGNAL REGENERATIVE RECEPTION SYSTEM
Document Type and Number:
Japanese Patent JP2003006991
Kind Code:
A
Abstract:

To prevent noise at the time of reproduction start and reproduction stop of a DSD musical signal by forecasting the switching point between music data and a mute pattern independently of the reproduction apparatus side.

IEEE1394 I/F 31 receives a isochronous packet transmitted through a transmission channel 20 with an IEEE1394 format, takes out music data from the packet and supplies them to a DRAM 32. The IEEE1394 I/F 31 monitors a data amount stored in the DRAM 32, reads a 1-bit digital signal, creates a mute pattern such as a 9-6 pattern, or changes the 1-bit digital signal and the mute pattern read out from the DRAM 32 with fade processing. A D/A converter 35 converts the 1-bit digital signal outputted from the IEEE1394 I/F 31 into an analog signal.


Inventors:
NAGASAWA YASUSHI
SHIBA KENJI
AOKI TETSUYA
Application Number:
JP2001188647A
Publication Date:
January 10, 2003
Filing Date:
June 21, 2001
Export Citation:
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Assignee:
SONY CORP
International Classes:
G10L19/00; G10L19/02; G11B20/10; H04H1/00; H04H5/00; H04H20/88; (IPC1-7): G11B20/10; G10L19/00
Domestic Patent References:
JP2000163888A2000-06-16
JPH04258852A1992-09-14
JPH03235589A1991-10-21
JP2001094448A2001-04-06
Foreign References:
EP1087557A22001-03-28
Attorney, Agent or Firm:
Akira Koike (2 outside)



 
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