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WO/2001/056152A1 |
The invention discovered a digital technologic attenuate control circuit of current-model step by step. The circuit include a lot of stages of current attenuate circuit; in each of the current attenuate circuit stage, the digital control...
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WO/2001/052414A1 |
The separation of an adjacent band pass filters (11, 12, 13, 14, 15) is improved, without changing the filters, by inverting (21, 22) the output signals from alternate filters (12, 14) and not inverting the remaining output signals. All ...
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WO/2001/050599A2 |
The present invention provides an active low-pass filter system including a low-pass filter circuit (22, 24, 26, 28, 30) and at least one frequency-rejecting network (20) coupled to the low-pass filter circuit. The frequency-rejecting ne...
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WO/2001/048989A1 |
An equaliser circuit comprises at least one tuneable transconductance element (12, 14, 16, 18, 22) having its operating parameters determined by its supply voltage (Vdd). An automatic tuning means can be used to vary the supply voltage o...
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WO/2001/048918A2 |
A polyphase filter (20; 100) is described, having two filter channels (30¿I?, 30¿Q?; 101¿I?, 101¿Q?) for processing an I-input signal ($g(f)¿I?) and a Q-input signal ($g(f)¿Q?) which is shifted over 90° with respect to the I-input...
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WO/2001/048924A1 |
A band pass filter (50) includes a pair of notch filters (51, 52) having different notch frequencies and a difference amplifier (54) coupled to the outputs of the notch filters. The notch filters preferably have response curves that inte...
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WO/2001/048920A2 |
Integrated circuits, for example, gyrator circuits include transistors that are preferably MOS devices and that are provided with series feedback networks, which compensate for the effects of channel delay in the MOS devices.
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WO/2001/047108A2 |
A polyphase filter passes a desired frequency and attenuates an image frequency in many communication systems. The invention is an error correction circuit that compensates the polyphase filter for low open loop gain operational amplifie...
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WO/2001/045273A2 |
The invention relates to a duplexer for a wireless communication system with a transmission band and a receiving band. According to the invention, a split surface wave filter consisting of at least two partial filters which cover adjacen...
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WO2000042659A9 |
An integrated circuit ESD protection system comprises: a local power supply bus, a local ground bus, a first local ESD clamp, and ESD ground bus disposed between local power supply and ground busses and coupled to the local power supply ...
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WO/2001/045252A2 |
An interpolator utilizes two ranks of transistors to generate a plurality of interpolator currents within the confines of a low power supply voltage. The first rank of transistors are underdriven, thereby generating a plurality of partia...
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WO/2001/041307A1 |
The invention relates to a filter circuit and a method for making a filter circuit comprising at least one gyrator core section (GCi) having four inverters mutually connected in a loop configuration between a pair of input terminals (i_1...
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WO/2001/041306A1 |
Disclosed are a circuit and a method for automatically tuning a filter circuit to compensate for variations in process, voltage, and temperature. The filter circuit includes one or more N-bit capacitor arrays. The circuit includes calibr...
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WO/2001/039362A2 |
The mixer circuit is a singled ended input to a double balanced high dynamic range mixer with only two base-emitter junctions across the supply. It provides for the use of bondwires to off chip ground as DC block and DC feed elements. Th...
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WO/2001/039372A1 |
The invention is an improved implementation of an active-RC polyphase band-pass filter with transconductor cross-coupling between filter sections. The polyphase filter has first to fourth inputs, first to fourth outputs, two filter secti...
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WO/2001/035529A2 |
The RF communication system includes an antenna that receives/transmits RF signals, a PLL (730) that generates multi-phase clock signals having a frequency different from a carrier frequency and a reference signal having a carrier freque...
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WO/2001/035527A2 |
Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such ...
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WO/2001/026339A1 |
A complementary comb filter (12) includes a plurality of band pass filters (13-17) and a plurality of notch filters (21-25), wherein the notch filters have the same center frequencies as the band pass filters or the same center frequenci...
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WO/2001/024352A1 |
A direct conversion receiver (10) having a homodyning section (12) and a filter (18). The filter (18) includes a plurality of serially coupled high pass filter stages (20(1)-20(n)). The high pass filter section (18) act as a dc offset co...
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WO/2001/024168A1 |
A preamplifier integrated circuit for a magnetic storage device includes a filter (155) in a forward signal path which has a low corner frequency (LCF) which varies in a time dependent manner related to the duration of a write-to-read di...
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WO/2001/024353A1 |
A filter (10) having a semiconductor chip (12) and a low pass filter section (14). The low pass filter section (14) includes a filter transconductor (18, 20) and a filter capacitor (Cf). The low pass filter section (14) has a cut-off fre...
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WO/2001/024363A2 |
An integrated circuit includes a filter with switched capacitors to dynamically adjust a corner frequency of the filter. Such dynamically adjustable filters are typically included in circuits to reduce noise, and consequently such filter...
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WO/2001/024178A1 |
A magnetic storage apparatus includes first and second control devices to effectively reduce a disturbance which occurs in a read channel (7A1, 7A2; 7B1, 7B2) of the apparatus upon transition from a write mode to a read mode. The first c...
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WO/2001/022581A1 |
A filter (60) includes an FET (65) as a variable resistor and a capacitor (64) in a phase shift network. An impedance multiplier (71) is coupled to the FET for increasing the range of resistance exhibited by the FET.
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WO/2001/022344A1 |
A double differential comparator can be efficiently implemented utilizing a first comparator stage having a folded cascode with floating gate input terminals and clamped single-ended output, and a capacitively coupled input stage for tra...
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WO/2001/016620A1 |
The invention is an automatic pole-zero adjustment circuit for an ionizing radiation spectroscopy system in which an amplitude histogram circuit (56) is used to obtain an amplitude histogram of an acquired spectrum. The shape of a select...
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WO/2001/015319A1 |
The present invention provides a feedback circuit comprising a first transistor (T3) and a second transistor (T4), each transistor having a gate, a drain and a source, in which the source of T3 is connected to the drain of T4 and the dra...
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WO/2001/011773A1 |
An electronic circuit for imitating a capacitor with a controllable capacitance comprises a chain (CHN) of at least two differential pairs (DF¿1?-DF¿3?), the tail of each differential pair (DF¿1?-DF¿3?) being connected to a reference...
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WO/2001/010021A1 |
The invention relates to an analog filter (IF) including at least one filter stage (FSTi) having an input terminal (INi), an output terminal (OUTi) and an impedance network (INET') connected between said input and output terminals (INi, ...
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WO/2001/010023A1 |
A filter circuit for connection between a mains supply line and a load powered by the mains, the filter circuit being capable of shunting to earth, at least within a given frequency band, radio frequency conducted emissions generated by ...
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WO/2001/010012A1 |
An offset voltage calibration circuit for use with a digital switching amplifier (400). The calibration circuit includes an analog-to-digital converter (406) for converting at least one DC offset voltage associated with the digital switc...
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WO/2001/010029A1 |
A phase shifting arrangement for generating a set of mutually orthogonal signals, comprising: a phase shifting unit for receiving an input signal and having a first phase shift circuit for generating a first output signal phase-shifted b...
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WO/2001/008300A1 |
An arrangement (1) for converting voltage (V¿in?) into current (I¿out?), implemented on a chip (100), comprises a first V/I converter (3), the operation of which is based on a conversion resistor (R¿conv?) formed on the chip. This res...
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WO/2001/008388A1 |
A telephone line feed circuit for use with a telecommunication line includes a transformer having a primary winding and a secondary winding wound with low resistance conductors, the primary for direct connection to a tip terminal and a r...
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WO/2001/008305A1 |
The present invention relates to a filter arrangement (8C) and a method for frequency filtering and impedance conversion. The invention makes it possible to perform frequency filtering and impedance conversion using fewer inductors than ...
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WO/2001/006648A1 |
The invention relates to an integrated gyrator structure, in which each transistor in the gyrator core (preferably MOS devices) has series feedback associated therewith. This allows for compensation over a large bandwidth of the effects ...
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WO/2001/005042A1 |
RF amplifiers used in communications systems exhibit backward intermodulation caused by non-linear amplification. Backward intermodulation of the transmit signal and an external signal, which reaches the output of the amplifier (2) throu...
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WO/2000/079695A1 |
The present invention relates to a RF connector arrangement. A 90 degree hybrid circuit is applied at each side of the connector to divide a signal into two paths. If the connector is disconnected, signals reflected in each path will can...
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WO/2000/074233A1 |
An IF VGA utilizes distorsion cancellation achieved with cross coupled differential pair amplifiers having their VDs dynamically modified in conjunction with current steering of the differential pairs sources.
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WO/2000/072446A1 |
An integrated VCO (4532) having an improved tuning range over process and temperature variations. There is therefore provided in a present embodiment of the invention an integrated VCO. The VCO comprises, a substrate, a VCO tuning contro...
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WO/2000/070760A1 |
A differential gyrator based filter is disclosed that preferably has a first gyrator connected to the positive input signal of the differential input signal and a second gyrator connected to the negative input signal of the differential ...
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WO/2000/070857A1 |
In an electronic inductor circuit, an operational amplifier drives the base of the electronic inductor transistor, and receives negative feedback from the emitter of the transistor. The transistor and operational amplifier combine to for...
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WO/2000/070759A1 |
A filter is disclosed that actively controls one or more filter characteristics, such as the cut-off frequency of a selected filter pole, while minimizing the value of selected filter components such as the capacitor components. This hel...
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WO/2000/069064A1 |
A circuit arrangement for providing impedance translation filtering comprises a first path and a second path. In a base band variant the first path is a feed forward path which comprises first and second series connected transconductance...
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WO/2000/067260A1 |
A feedback system includes an emitter-follower as a gain stage in the forward path. The emitter-follower has a very wide band width and does not, by itself, effectively narrow the bandwidth of an information channel in which it is used. ...
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WO/2000/062419A2 |
An integrated receiver with channel selection and image rejection is substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filt...
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WO/2000/060745A1 |
A hybrid loop filter (100) includes an integrator (114) having an input and an output wherein the output forms an output of the hybrid loop filter, a plurality of transconductance amplifiers (130-1....130-n) having an input and an output...
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WO/2000/060314A1 |
A two-step control process is used for correcting the output signals of incremental measuring systems. According to the invention, the signal parameters signal amplitude, signal offset and phase relationship of the signals can be correct...
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WO/2000/055969A1 |
A method and apparatus (100) is provided for impedance matching for a system capable of supporting voice and data bands. The method includes receiving an input signal having a voice and data band, filtering at least a portion of the data...
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WO/2000/054402A1 |
A signal processing circuit (400) is described including a frequency selective network (402-0 to 402-(n-1)) in a feedback loop. An analog-to-analog converter (408) in the feedback loop is coupled to the frequency selective network (402-2...
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