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WO/2004/070951A2 |
A servo system comprising an analog sigma delta modulator for generating a normalized digital error correction signal from first and second analog control signals. The sigma delta modulator comprises an analog low-pass filter, a quantize...
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WO/2004/034307A2 |
Apparatus, methods and articles of manufacture are disclosed for digital signal modification. Various wave characteristics of an electromagnetic wave may be modified according to desired values. Those values are provided to one or more c...
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WO/2004/027680A1 |
ABSTRACTAn arithmetic circuit to calculate a cumulative value of results of parallel arithmetic processing, in which the increase of the circuit area for multiple-term arithmetic computation and the degradation of accuracy of holding of ...
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WO/2004/021251A2 |
An apparatus and method for adding input voltage signals. First 206 and second 208 input voltage signals are respectively sampled onto first 218 and second 228 capacitors during a first clock phase 202. In response to a second clock phas...
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WO/2003/054533A1 |
A method and apparatus (5) for simulating and analyzing industrial thermal processes, including industrial heat-treatment processes, melting, solidification, quenching and the like, used in the manufacture of metals, alloys and metal mat...
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WO/2003/017180A1 |
A circuit comprising a digital processor, analogue processing means, a digital to analogue converter for converting digital values output from the digital processor into analogue values which are processed by the analogue processing mean...
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WO/2002/091471A2 |
An integrated circuit (100) comprising an analogue circuit (30) and optionally a digital circuit (50) couples substrate noise present on the integrated circuit ground rail (114) onto a supply rail (116) of the analogue circuit. The volta...
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WO/2002/088990A2 |
The present invention relates to a parallel processor network, a processor and a method for solving differential equations in a parallel processor network. A parallel processor network includes several processors (processing units) that ...
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WO/2002/037298A2 |
A configurable mixed analog and digital mode controller may be fabricated as a single monolithic device such as an integrated circuit semiconductor die or a multi-chip package (MCP). The configurable mixed analog and digital mode control...
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WO/2002/033642A1 |
The invention relates to a circuit configuration that comprises a first generator (1) controlled by a first input signal (U¿1?) for producing a first clock signal (T¿1?), a second generator (2) controlled by a second input signal (U¿2...
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WO/2002/029701A1 |
The invention relates to a circuit for forming a ratio for two analogue input signals and producing a digital output signal corresponding to the ratio for the two input signals. Said circuit comprises an integrator which can be controlle...
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WO/2001/054047A1 |
Circuitry that generates an interface signal between a first and a second integrated circuit (IC). The circuitry includes a reference circuit that provides a reference signal, an interface circuit, and a circuit element. The interface ci...
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WO/2001/010012A1 |
An offset voltage calibration circuit for use with a digital switching amplifier (400). The calibration circuit includes an analog-to-digital converter (406) for converting at least one DC offset voltage associated with the digital switc...
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WO/2001/008380A1 |
A high resolution delay line includes a coarse delay having a minimum period of delay and a fine delay having a total delay that is equal to or greater than half the minimum period. Each delay can be implemented in analog or digital form...
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WO/2000/075761A1 |
Methods and an apparatus (300) for generating random numbers are disclosed. In a first embodiment, a method for generating random numbers involves producing a second random number. A pseudorandom number is produced from a digital random ...
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WO/2000/063825A1 |
The integrator circuit comprises a card (10) for measuring the signal (e) which is to be integrated in time at sampling moments, a card (11) for dating the sampling moments and a card (12) on which the values and sampling moments are rec...
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WO/2000/057342A1 |
A signal interface circuit (10) having a terminal (14) for connection to a simulator system indicated schematically at (16), and a terminal (18) for connection to a system under test, indicated generally at (20). The simulator system may...
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WO/2000/052630A1 |
The invention relates to a non-linear transfer device consisting of or approached by a bit linear function, whereby the bits are defined according to intervals of variation in an input signal pertaining to a device comprising the followi...
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WO/2000/049558A1 |
A random number generator (100) for generating random numbers. The generator may include two similarly implemented random signal sources (110, 120), with each source generating a random signal. A difference signal (134) of the two random...
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WO/1999/059250A1 |
A digital to synchro converter converts digital values to an analog synchro signal. The values are mapped in a memory and sent to a digital to analog converter converting the digital values to analog values. Sample and hold circuitry is ...
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WO/1999/045651A1 |
The invention relates to a device for signal processing in time discrete values for signal scanning systems such as digital analog converters, switched capacitor filters, direct digital synthesizers, sample and hold circuits and the like...
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WO/1999/026181A2 |
A method for producing an electronic signature in a font format from a manual signature, comprising the steps of: (a) providing a raster image of the manual signature (10); (b) cleaning the raster image to remove noise, such that the ras...
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WO/1998/033137A2 |
A digital waveform generator (10) reads out simulated $g(D)$g(S) ADC data (40) for a desired periodic analog waveform from a memory (38) and converts it, using a low-resolution high speed DAC (50), into a synthesized analog waveform (54)...
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WO/1998/004926A1 |
Power measurement equipment is used to calculate the momentary value of the power actually taken from a network in which both current and voltage are variable, the voltage to a lesser but perceptible extent, the current in a distinct man...
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WO/1998/002838A1 |
An apparatus and a method for multiplying two time varying signals to produce a four quadrant, multiplied signal is provided. In one embodiment of the present invention, an apparatus for multiplying a first signal with a second signal in...
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WO/1997/050178A1 |
Circuit for the digital setting of analogue parameters with at least two analogue multipliers (1, 2, 3) one group of inputs of which are connected mutually in parallel and are actuated by an input signal (10, 11). A weighting signal can ...
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WO/1996/030827A1 |
A semiconductor operational circuit capable of executing an operation of an analog vector at a high speed and highly accurately. The semiconductor operational circuit for executing a predetermined operation of a signal train of N signals...
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WO/1996/018243A1 |
An interference dependent adaptive phase clock controller method and system includes synthesis of a signal processing clock signal (307). An interference signal (311) dependent on a phase of the signal processing clock signal is measured...
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WO/1995/032478A1 |
An arrangement of analog circuit modules (21, 23, 25, 27, 33, 37, 39) assembled on a single integrated circuit chip (922) with the ability of the user to program, by serially providing configuration data (Fig. 6) to the chip through its ...
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WO/1995/032481A1 |
A number of analog circuit modules are assembled on a single integrated circuit chip with the ability of the user to program, through pins of the circuit, certain functions and operational parameters of the individual modules, and to int...
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WO/1995/001006A1 |
A digital-to-analog (D/A) convertor (206) multiplies an input signal by a sinewave approximation (300) to perform frequency translation. Optimized coefficient values are predetermined and are programmed based on a control word generated ...
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WO/1995/000921A1 |
A configurable analog and digital array is produced in hierarchical structure in at least two planes. It comprises at least two first-order matrix arrangements, each having a plurality of basic units in rows and/or columns which are at l...
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WO/1994/019763A1 |
A signal processing circuit which provides an accurate continuously tunable impedance. A tunable continuous time transconductor G(s) which may for example comprise an opto-electronic inductor, has a discrete time current processor -H(z) ...
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WO/1994/007212A1 |
A filter system with low throughput delay having at least two parallel filters, either sampled-data or continuous, wherein one of the filters has a low throughput delay in comparison with the other filters.
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WO/1994/003854A1 |
A failsafe avionics interface unit (10) serves as a protocol converter system for translating data for control purposes from a digital communication bus (65) to an analog control channel as an upgrade or interface to an existing analog c...
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WO/1994/003413A1 |
A programmable VLSI chip (200) and method for analog solution of a family of partial differential equations commonly encountered in engineering and scientific computing: the Laplace equation, the diffusion or conduction equation, the wav...
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WO/1993/026093A1 |
In order to implement high resolution A/D (or D/A) conversion, the differentiated waveform of an analogue (or digital) waveform signal is generated by a differentiated waveform generating unit (10). The differentiated waveform is cyclica...
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WO/1993/018578A1 |
A low-power digital frequency synthesizer combining direct digital frequency synthesis techniques with serrodyne frequency translation principles to produce a wideband frequency response with high spectral purity. A conventional direct d...
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WO/1993/001591A1 |
A method and apparatus for error detection and correction in the storage and retrieval of digital data on magnetic storage systems includes forming and storing a set of reference waveforms (... Wn-1, Wn, Wn+1, ...) having assigned refere...
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WO/1992/022060A1 |
An electronic method and apparatus for signal encoding and decoding to provide ultra low distortion reproduction of analog signals, while remaining compatible with industry standardized signal playback apparatus not incorporating the dec...
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WO/1992/014218A1 |
A frequency synthesiser for generating a sinusoidal analogue signal comprises a digital signal generator for generating a substantially triangular digital signal. A digital to analogue converter (DAC) receives the digital signal. The DAC...
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WO/1992/004673A1 |
Memory technologies for storing include RAMS and CCDs. Adaptive memory capability and memory servo capability improve memory characteristics. In a RAM embodiment, a detector (220B, 220A) is used to detect a memory address condition (217)...
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WO/1991/018365A1 |
A digital audio signal generator (30) includes an EPROM memory (32) containing a digitally encoded audio signal sampled at a fixed rate. An address counter (48) retrieves the digital values sequentially from the memory, and the data is f...
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WO/1991/011725A1 |
The instantaneous AC voltage v is applied to a full-wave rectifier (10) and a phase detector (11). The output of the full-wave rectifier is applied to an analogue to digital convertor (1) and the output of this is in turn applied to a di...
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WO/1991/000648A1 |
A waveform generating circuit, wherein a master clock signal is fed into a tapped string of adjustable delay lines, (810A-810G in Fig. 8) and the tapped delay outputs are used to control selection of scaled voltage fractions for output. ...
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WO/1990/011498A1 |
An information processing system comprises a digital computing system (20), an analog processing device (33-35, 38) comprising an arrangement (33) for converting electrical information to information of analog form, and an arrangement (3...
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WO/1989/006009A1 |
A method and apparatus for reducing spurious output noise in digital frequency synthesizers that employ a sine amplitude converter (16) connected to a Digital-to-Analog converter (18) for generating an analog waveform from sine amplitude...
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WO/1989/000279A2 |
An analog-digital correlator (10) utilizes a plurality of sample and hold circuits (16-0 to 16-(M-1)) to directly store samples of a received analog signal. Bits of a correlation pattern are shifted through stages in a correlation patter...
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WO/1988/010474A1 |
A neural network is implemented by discrete-time, continuous voltage state analog devices in which neuron signals (9), synapse signals (7) and synaptic strength signals (15) are generated in highly parallel analog circuits in successive ...
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WO/1988/009090A1 |
A metod and apparatus for converting a digital signal (10) into a band-limited analog signal with variable bandwidths, a high level of performance, high spurious frequency rejection, and simple implementation, employing polyphase interpo...
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